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Test netlist for Eldo & Spice mode


!---------------------------------------------------------------
!-- Project       : (X)emacs eldo & spice mode
!-- Circuit name  : test_netlist.cir
!---------------------------------------------------------------
!-- Designer(s)   : E. ROUAT <emmanuel.rouat@.wanadoo.fr>
!                 : G. VAN DER PLAS <geert_vanderplas@email.com>
!-- Library       : 
!-- Purpose       : Test for eldo and spice mode 
!-- Inputs        : 
!-- Outputs       : 
!-- Supplies      : 
!-- References    : 
!---------------------------------------------------------------

mn1 1 2 3 4 nmos w='10u*wscale' l=1u
Xaaa 1 2 3 4 5 6 FOO param: test=10f

! Note the difference between 'comments' and 'doc strings' :

* This is a 'commented out' line
! and this is a 'doc' string
* and a combination !of $both

! You can comment out portions of text using #c/#e:

#c
.model MY_NMOS NMOS LEVEL=3 
+ VTO=1V UO=550 VMAX=2.0e5 
+ CGDO=0.4p CGBO=2.0e-10

.model MY_PMOS NMOS LEVEL=3 
+ VTO=-1V UO=230 VMAX=1.9e5 
+ CGDO=0.4p CGBO=2.0e-10
#e

! By using 'C-c C-c' you can 'toggle' between commented out portions
! of test - select the region that follows, type 'C-c C-c' (or use
! the '(Un)comment-region menu)' and see what happens:

! <select from here>

.param Rload=1MEG
.param Cload=1nF
*.param Rload=10MEG
*.param Cload=0.1nF

! <to here>

!--------------------------------------------------------------------
!	LIBRARIES 
!--------------------------------------------------------------------

! 'models.lib' should highlight when the moude pointer passes over it.
! This means you can load this file using the middle moude button (if
! the file exists)

.include models.lib
.lib key=typical models.lib


! Lets define some MOSFET models - these should appear in
! the 'Models' entry in the menu.

.model MY_NMOS NMOS LEVEL=3 
+ VTO=1V UO=550 VMAX=2.0e5 
+ CGDO=0.4p CGBO=2.0e-10

.model MY_PMOS NMOS LEVEL=3 
+ VTO=-1V UO=230 VMAX=1.9e5 
+ CGDO=0.4p CGBO=2.0e-10

! The following has a wrong syntax - note the fontification

.model 1WRONG_SYNTAX NMOS
+ LEVEL =2  


!--------------------------------------------------------------------
!	NETLIST 
!--------------------------------------------------------------------

! Lets define a subckt - a parametrised inverter

.SUBCKT FOO IN OUT VDD VSS param: W=5u L=0.5U
MP OUT IN VDD VDD MY_PMOS W={3*W} L={L}
MN OUT IN VSS! VSS! MY_NMOS W={W} L={L}
.ENDS FOO


! In the following instanciations, FOO should be highlighted

X1 1 2 3 4 FOO 
X2 1 2 3 4 FOO param: W=10u L=1u
X3 1 2 3 4 FOO ! comment

! Even in multi-line instanciations:
X4 1 2 3 4 
+ FOO param: W=10u L=1u
X5 1 2 
+ 3 4 FOO param: W=10u L=1u


! This one doesn't work - probably never will, in spice now it works
Xfail 1 2 3 4 
* commented line 
+ FOO param: W=10u L=1u


! FOO#1 is a valid name, but 1AOO1 isn't:

X6 1 2 3 4 FOO#1
X7 1 2 3 4 1AOO1



!--------------------------------------------------------------------
!	SIMULATION OPTIONS 
!--------------------------------------------------------------------



.options STAT=1 SIMUDIV=10 !Status reports
.options noascii nomod engnot  
.options nowarn=240 nowarn=902 nowarn=123 
.options eps=1e-7 itol=1e-6 gmin=1e-16 analog 
.options nobound_phase paramfly inclib 
.width out=80 
.temp 27 

! Now some inputs and supplies

VDD VDD 0 DC 5V
VSS VSS 0 DC 0

VIN IN 0 Pulse(0 5 1us 0.1ns 0.1ns 10ns 20ns)

! Simulation cards - fontified in 'eldo-analysis-face' or 'spice-analysis-face'

.op
.tran 0.1us 10us 

! What will we look at? All 'output' cards are fontified 
! in font-lock-preprocessor-face:

.plot tran V(IN) V(OUT)
.plot tra V(OUT) ! Note wrong syntax
.probe I V

.extract tran AVERAGE(I(VDD)) 

.END

ytest opamp1 n1 n2

!--------------------------------------------------------------------
!	Changelog 
!--------------------------------------------------------------------

** Thu Apr 11 2002 Geert Van der Plas <geert_vanderplas@email.com>

**    - added spice mode remarks

* Thu Apr  5 2001 E. ROUAT (DAIS) <emmanuel.rouat@st.com>

    - File created


*** Local Variables:
*** mode:spice
*** End: